Course Objectives: To study the properties and applications of integrated digital electronic devices
1.0 Bipolar Transistor Switching Characteristics (6 hours)
1.1 The Ebers-Moll equations
1.2 Depletion region charge and delay time
1.3 Base region charge and the succession of steady states model
1.4 Rise, storage and fall time calculations
2.0 MOS Transistor Switching Characteristics (6 hours)
2.1 The quadratic dc equation in pre-pinch-off and in pinch-off
2.2 Device and parasitic capacitances
2.3 Turn-on and turn-off times
3.0 Bipolar Transistor Logic Circuits (6 hours)
3.1 Types of devices
3.2 Speed calculations, propagation delays
3.3 Power dissipations
3.4 Fan out
3.5 Noise margin
4.0 The NMOS Family of Logic Circuits (6 hours)
4.1 Types of devices
4.2 Speed calculations, propagation delays
4.3 Power dissipation
4.4 Noise margin
5.0 The CMOS Family of Logic Circuits (6 hours)
5.1 Types of devices
5.2 Speed calculations, propagation delays
5.3 Power dissipations
5.4 Fan out
5.5 Noise margin
6.0 Comparision of Logic Families (2 hours)
7.0 Memory (4 hours)
7.1 Random access memory (RAM)
7.2 Dynamic random access memory (DRAM)
7.3 Read-only memory (ROM)
7.4 Electrically erasable and programmable read only memory (EEPROM)
7.5 Comparision of memory types
8.0 Other Topics (9 hours)
8.1 Programmable logic arrays (PLA)
8.2 Very large scale integrated systems (VLSI)
8.3 Charge coupled devices (CCDs)
8.4 Integrated injection logic (IIL)
Laboratory:
1.0 Bipolar transistor switching
2.0 MOS transistor switching
3.0 Bipolar transistor logic gates
4.0 NMOS logic gates
5.0 CMOS logic gates
6.0 Programmed logic array usage
References:
1.0 D A Hodges and H G Jackson, “Analysis and Design of Digital Integrated Circuits”, McGraw-Hill, New York, 1983
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